1. Field of the Invention
The present invention relates to analog-to-digital and digital-to-analog conversion techniques. More specifically, the present invention relates to digital correction techniques for analog-to-digital and digital-to-analog converters.
While the present invention is described herein with reference to a particular embodiment for an illustrative application, it is understood that the invention is not limited thereto. Those having ordinary skill in the art and access to the teaching provided herein will recognize additional modifications, applications and embodiments within the scope thereof.
2. Description of the Related Art
There is a continuing need to build analog-to-digital (A/D) converters and digital-to-analog (D/A) converters offering higher speed, higher resolution and lower cost. For an A/D converter, `resolution` refers to the number of digital bits that the converter provides from an analog input, and for a D/A converter, `resolution` refers to the number of digital bits provided to the converter for conversion to an analog signal. Typically, high resolution A/D converters require high precision non-linear circuits to accurately resolve the analog input. Providing reliable A/D converters having this high precision analog circuitry generally requires difficult and expensive manufacturing procedures. The same limitations hold for D/A converters as well. However, with current technology it has become more attractive to employ digital correction techniques rather than high precision analog circuitry for A/D and D/A converters.
One commonly used digital correction technique for providing an A/D converter with higher resolution and lower cost is typically referred to as the Sigma-Delta algorithm. This approach usually employs a low resolution A/D converter and a low resolution D/A converter in a feedback configuration to realize a high resolution A/D converter. With this feedback approach, a Sigma-Delta converter is relatively insensitive to noise generated by the low resolution A/D converter and other converter components. However, there are several problems with current Sigma-Delta implementations.
In the typical Sigma-Delta approach, the low resolution D/A converter must be as accurate as the overall conversion, because generally, the D/A converter errors propagate directly to the final output of the A/D converter. This accuracy requirement for the D/A converter often leads to production difficulties resulting in increased converter cost.
The errors induced by the low resolution D/A converter are both static and dynamic. In most cases, dynamic errors do not present as much of a problem as static errors, because typically other areas of the A/D converter limit the A/D conversion speed and thus decrease the effects of dynamic errors. It is therefore the static errors that receive considerable attention in the design of A/D converters.
Because of these static errors, most D/A converters employed in a Sigma-Delta approach are of single bit resolution. Static errors in single bit D/A converters simply create gain and offset errors in the overall A/D conversion, because the A/D converter performs a linear interpolation between the two levels of the single-bit D/A converter. Gain and offset errors do not significantly reduce the overall dynamic range of the A/D converter, since gain and offset errors simply alter the input range of the A/D converter. However, the use of single bit D/A converters reduces the resolution and speed of the A/D conversion, compared with the use of a multi-bit D/A converter.
There is therefore a need in the art for improved techniques for providing A/D and D/A converters with higher resolution at increased conversion speeds, while reducing manufacturing costs. Specifically, there is a need for an improved technique for providing a D/A converter with higher resolution for use in a Sigma-Delta A/D converter.